List of Siemens Questa One Sim Customers
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Since 2010, our global team of researchers has been studying Siemens Questa One Sim customers around the world, aggregating massive amounts of data points that form the basis of our forecast assumptions and perhaps the rise and fall of certain vendors and their products on a quarterly basis.
Each quarter our research team identifies companies that have purchased Siemens Questa One Sim for Electronic Design from public (Press Releases, Customer References, Testimonials, Case Studies and Success Stories) and proprietary sources, including the customer size, industry, location, implementation status, partner involvement, LOB Key Stakeholders and related IT decision-makers contact details.
Companies using Siemens Questa One Sim for Electronic Design include: MediaTek, a Taiwan based Manufacturing organisation with 21982 employees and revenues of $16.17 billion, Arm Holdings, a United Kingdom based Professional Services organisation with 8330 employees and revenues of $4.01 billion, Rambus, a United States based Manufacturing organisation with 690 employees and revenues of $328.0 million and many others.
Contact us if you need a completed and verified list of companies using Siemens Questa One Sim, including the breakdown by industry (21 Verticals), Geography (Region, Country, State, City), Company Size (Revenue, Employees, Asset) and related IT Decision Makers, Key Stakeholders, business and technology executives responsible for the software purchases.
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| Logo | Customer | Industry | Empl. | Revenue | Country | Vendor | Application | Category | When | SI | Insight | Insight Source |
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Arm Holdings | Professional Services | 8330 | $4.0B | United Kingdom | Siemens Digital Industries Software | Siemens Questa One Sim | Electronic Design | 2025 | n/a | In 2025, Arm Holdings deployed Siemens Questa One Sim, an advanced functional simulator, under the Electronic Design category at its United Kingdom headquarters. Siemens described the engagement as an early-adopter deployment and Arm is using the Siemens Questa One Sim to address large IC verification workloads. The implementation focuses on functional simulation for verification of AArch64 projects, with the simulator configured to execute extensive regression suites and large-scale design verification scenarios. Implemented capabilities emphasize advanced functional simulation, regression orchestration, and processing of large IC verification workloads consistent with verification and EDA toolchain practices. Arm reports improved performance, cost-efficiency and reduced regression time on AArch64 projects. Operational scope is verification engineering at Arm's UK site, delivered as a verification and EDA deployment concentrated on engineering workflows and verification labs. Governance was organized around verification team practices and early-adopter testing cycles as described by Siemens, enabling iterative tuning of simulation performance within existing verification pipelines. | |
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MediaTek | Manufacturing | 21982 | $16.2B | Taiwan | Siemens Digital Industries Software | Siemens Questa One Sim | Electronic Design | 2025 | n/a | In 2025, MediaTek implemented Siemens Questa One Sim as part of its Electronic Design toolset to support IC verification activities in Taiwan. The deployment concentrated on adopting simulation and formal verification technologies within the Questa One Sim environment to enhance verification engineering workflows. The implementation leveraged simulation and formal verification capabilities of Siemens Questa One Sim, configured to support cycle-driven and event-driven simulation, assertion-based verification, and formal property checking across block and subsystem verification. Configuration work focused on integrating Questa One Sim testbench execution, regression scheduling, and automated waveform capture to standardize verification runs and reduce manual orchestration. Operational coverage centered on MediaTek verification engineering groups working on ASIC and SoC designs in Taiwan, embedding Siemens Questa One Sim into existing EDA toolchains and lab environments. The rollout emphasized consistent tool configurations and reproducible regression practices to align verification teams on common processes and deliverables. Governance changes included standardizing verification workflows, instrumenting simulation and formal runs for traceability, and establishing ownership for verification environment maintenance. Siemens reported that MediaTek increased engineers' productivity across the verification process following adoption of the simulation and formal verification technologies in Siemens Questa One Sim. | |
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Rambus | Manufacturing | 690 | $328M | United States | Siemens Digital Industries Software | Siemens Questa One Sim | Electronic Design | 2025 | n/a | In 2025, Rambus implemented Siemens Questa One Sim, adopting the solution within the Electronic Design category for semiconductor verification. The deployment was executed in the United States as a targeted semiconductor verification initiative supporting Rambus' silicon IP programs. Rambus leveraged the complete Questa One solution, including simulation, static and formal analysis, to streamline verification of silicon IP for PCIe, CXL and HBM interfaces. The implementation of Siemens Questa One Sim combined dynamic simulation engines with static lint and formal property checking to increase coverage and accelerate assertion based verification workflows. Operational scope focused on the verification organization and silicon IP engineering teams, aligning tool flows with SoC and chiplet design verification activities and customer SoC integrations. The deployment supported regression management, testbench orchestration, and formal analysis handoffs across Rambus verification labs in the United States. Governance changes included formalizing verification workflows and embedding static and formal analysis into standard sign off gates, as cited by Siemens in 2025 for streamlining Rambus' verification process. Siemens reported that the implementation increased confidence for customer SoC and chiplet designs, reflecting tighter verification controls and earlier discovery of protocol and interface defects. |
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