List of Synopsys VCS Customers
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Since 2010, our global team of researchers has been studying Synopsys VCS customers around the world, aggregating massive amounts of data points that form the basis of our forecast assumptions and perhaps the rise and fall of certain vendors and their products on a quarterly basis.
Each quarter our research team identifies companies that have purchased Synopsys VCS for Electronic Design from public (Press Releases, Customer References, Testimonials, Case Studies and Success Stories) and proprietary sources, including the customer size, industry, location, implementation status, partner involvement, LOB Key Stakeholders and related IT decision-makers contact details.
Companies using Synopsys VCS for Electronic Design include: Qualcomm, a United States based Manufacturing organisation with 52000 employees and revenues of $44.28 billion, AMD, a United States based Manufacturing organisation with 28000 employees and revenues of $25.79 billion, IntelliProp, a United States based Manufacturing organisation with 30 employees and revenues of $5.0 million, Graphcore, a United Kingdom based Professional Services organisation with 10 employees and revenues of $1.0 million and many others.
Contact us if you need a completed and verified list of companies using Synopsys VCS, including the breakdown by industry (21 Verticals), Geography (Region, Country, State, City), Company Size (Revenue, Employees, Asset) and related IT Decision Makers, Key Stakeholders, business and technology executives responsible for the software purchases.
The Synopsys VCS customer wins are being incorporated in our Enterprise Applications Buyer Insight and Technographics Customer Database which has over 100 data fields that detail company usage of software systems and their digital transformation initiatives. Apps Run The World wants to become your No. 1 technographic data source!
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| Logo | Customer | Industry | Empl. | Revenue | Country | Vendor | Application | Category | When | SI | Insight |
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AMD | Manufacturing | 28000 | $25.8B | United States | Synopsys | Synopsys VCS | Electronic Design | 2008 | n/a |
In 2008, AMD began using Synopsys VCS as a primary functional verification solution. AMD implemented Synopsys VCS in the Electronic Design category to support verification of large, advanced-node designs, with adoption concentrated in the United States and focused on improving verification productivity.
The Synopsys VCS deployment emphasized SystemVerilog flows, historically using OVM and SystemVerilog-based testbench methodologies. Implementations leveraged VCS capabilities for high performance simulation, assertion checking, waveform debug, and coverage-driven verification, with explicit integration into debug and coverage tooling to accelerate root cause analysis.
Operational coverage centered on verification engineering teams within AMD design sites in the United States, standardizing simulation workflows and testbench practices. Rollout prioritized toolchain consolidation and verification flow standardization, embedding Synopsys VCS into existing verification processes rather than extending into nonverification business functions.
The use of Synopsys VCS benefitted from the product’s mature SystemVerilog support and debug and coverage tool integration, which AMD cited as contributing to improved verification productivity for complex designs.
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Graphcore | Professional Services | 10 | $1M | United Kingdom | Synopsys | Synopsys VCS | Electronic Design | 2020 | n/a |
In 2020, Graphcore used Synopsys VCS to verify its Colossus GC200 IPU as part of a large-scale functional verification program. The implementation targeted verification of a massively parallel AI processor within Graphcore's Colossus GC200 IPU design, executed by the UK verification team. This engagement sits in the Electronic Design category and focused on system level and IP level functional verification workflows.
Graphcore implemented Synopsys VCS with Verdi debug capabilities to accelerate simulation and root cause analysis, employing advanced simulation and waveform inspection workflows common to Electronic Design verification. The deployment emphasized high throughput simulation runs and regression orchestration to exercise parallel compute elements of the IPU, with testbench driven simulation and iterative debug loops to isolate concurrency issues and complex microarchitectural behavior. Synopsys VCS was used to scale simulation performance and improve visibility into failure modes during deep functional regressions.
Operationally the work was carried out by the UK verification team and integrated into existing verification pipelines within Graphcore's engineering organization. The use of Synopsys VCS resulted in significantly higher simulation throughput for the Colossus GC200 IPU, reduced regression turnaround time, and a measurable productivity boost for complex IPU verification as reported by the verification team.
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IntelliProp | Manufacturing | 30 | $5M | United States | Synopsys | Synopsys VCS | Electronic Design | 2020 | n/a |
In 2020, IntelliProp implemented Synopsys VCS as part of an Electronic Design verification stack to support development of an NVDIMM-P memory controller and meet an aggressive design schedule. The deployment focused on NVMe chip-level verification and a goal to bring up an IP testbench within 24 hours to accelerate server SoC delivery timelines.
The implementation combined Synopsys VC Verification IP for NVDIMM-P, the VCS simulator, and Verdi debug to form a cohesive verification toolchain. Synopsys VCS was used as the simulation engine, VC Verification IP provided JEDEC aligned protocol coverage, and Verdi Debug supplied protocol and timing analysis to expedite root cause identification and testbench stabilization. The verification environment was built using UVM, designed for scalability and reuse across subsequent IP and SoC projects.
Integration work unified two UVM based models that exercised different protocols into a single verification environment, enabling protocol interoperability testing for Gen Z and NVMe use cases. The configuration preserved compatibility with a third party simulator used in parts of the Gen Z chip level platform, enabling heterogeneous simulation flows without replacing existing simulation assets. The combined toolset streamlined testbench bring up, convergence, and debug paths for verification engineers.
Governance emphasized standards compliance and reusable verification processes, leveraging VC Verification IP to ensure JEDEC specification conformance and embedding Verdi based debug flows into the verification lifecycle. The project delivered the stated outcome that IntelliProp accelerated its design schedule and met its design goals by using Synopsys VCS within the Electronic Design verification stack, while retaining a scalable UVM environment for future reuse.
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Manufacturing | 52000 | $44.3B | United States | Synopsys | Synopsys VCS | Electronic Design | 2023 | n/a |
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