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Westpac NZ, an Infosys Finacle customer evaluated nCino Bank OS

Wayfair, a Korber HighJump WMS customer just evaluated Manhattan WMS

Moog, an UKG AutoTime customer evaluated Workday Time and Attendance

Citigroup, a VestmarkONE customer evaluated BlackRock Aladdin Wealth

Cantor Fitzgerald, a Kyriba Treasury customer evaluated GTreasury

Swedbank, a Temenos T24 customer evaluated Oracle Flexcube

Michelin, an e2open customer evaluated Oracle Transportation Management

List of Cadence EDA in the Cloud Customers

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Logo Customer Industry Empl. Revenue Country Vendor Application Category When SI Insight
HiSilicon China Manufacturing 7000 $8.3B China Cadence Design Systems Cadence EDA in the Cloud Electronic Design 2016 n/a
In 2016, HiSilicon China implemented Cadence EDA in the Cloud as part of a targeted adoption of the Cadence Innovus implementation system for production DSP designs, aligning the project explicitly with Electronic Design workflows. The implementation centered on applying the Cadence Innovus implementation system to HiSilicon production DSP blocks, positioning Cadence EDA in the Cloud as the core physical implementation environment used by the chip design organization. This placement establishes a clear Company Application Category Business Function relationship, HiSilicon China Cadence EDA in the Cloud Electronic Design physical implementation for DSP designs. The deployment emphasized physical implementation capabilities common to the Electronic Design category, including placement and routing, timing closure and optimization, and power aware implementation for DSP macros and blocks. Cadence EDA in the Cloud was provisioned to support concurrent physical design runs and iterative timing analysis, enabling the Innovus implementation flows to operate within cloud-scaled compute and storage while retaining centralized design database access. Configuration focused on integrating Innovus implementation flows into HiSilicon's RTL to GDSII orchestration, and on standardizing tool flows for production DSP design signoff. Operational coverage targeted HiSilicon's semiconductor physical design and implementation teams, embedding Cadence Innovus based flows into production tapeout processes for DSP designs and into engineering change control for chip signoff. Governance concentrated on formalizing implementation signoff checkpoints and design handoff procedures between front end design and physical implementation, ensuring Cadence EDA in the Cloud was the authoritative implementation platform within HiSilicon's Electronic Design practice. No system integrator was specified in the source, and the narrative reflects implementation architecture, modules, and operational scope as stated.
Infineon Technologies Manufacturing 53599 $13.9B Germany Cadence Design Systems Cadence EDA in the Cloud Electronic Design 2019 n/a
In 2019, Infineon Technologies deployed Cadence EDA in the Cloud to support its Electronic Design activities for analog and mixed-signal development. The deployment was positioned to institutionalize continuous improvements to tools and processes, with explicit ownership assigned to a Staff Engineer Analog Design Methodology for schematic entry and Design System maintenance. Cadence EDA in the Cloud implementation centers on analog generator workflows for front end and back end design, netlisting tools producing cdl and Verilog outputs, and automated test bench generation using ADE XL capabilities. The environment includes support for the Cadence Virtuoso Software Suite and Cadence EAD, and extends to in-house software developed with SKILL, TCL, Perl and Python to instrument AMS circuit design flows. Operational architecture integrates cloud-hosted EDA tooling with Unix and Linux workstations and existing LSF server farms for batch job queuing and simulation throughput. The implementation maintains direct vendor and customer touchpoints worldwide to ensure toolchain alignment with external IP and foundry requirements, while keeping Cadence Virtuoso and Cadence EAD as core integrated authoring and verification interfaces. Governance and process responsibilities were defined around Design System development and maintenance, ongoing debugging of netlisting tools, and ownership of testbench generation and support processes. The role emphasizes cross-functional collaboration across analog design teams, tool developers and external vendors, and aligns with Infineon’s Technical Ladder career path for engineering leadership and methodology stewardship.
Renesas Electronics Manufacturing 22711 $8.8B Japan Cadence Design Systems Cadence EDA in the Cloud Electronic Design 2018 n/a
In 2018, Renesas Electronics provisioned Cadence EDA in the Cloud to support Electronic Design activities within its Infra Power Design Department, addressing mixed signal IC work for monolithic Smart Power Stage products. The deployment was tied to Hardware Engineering functions in Takasaki and intended to strengthen circuit design and verification capacity for high current DCDC converters, amplifiers, protection circuits and interface circuits. The implementation centered on cloud-hosted Cadence design tools to enable schematic capture, physical layout, mixed signal simulation and verification flows, and automated design rule checks consistent with an Electronic Design toolchain. Configurations emphasized mixed signal IC design flows and lab test orchestration, with access controls and design data management to support concurrent design and verification work by lead analog designers and verification engineers. Operability was integrated with physical lab evaluation workflows, as teams used Cadence EDA in the Cloud outputs to drive prototype sample testing and bench evaluation of DCDC converters. The project explicitly supported cross-border collaboration, connecting the Japan design team with USA IPDD design and marketing counterparts, and enabling communication between design engineers and application engineers in support of product development across infrastructure, IoT and mobile segments. Governance and rollout focused on embedding a lead Analog Design Engineer role to centralize circuit design ownership, establish global communication practices in English and Japanese, and align design verification and bench test handoffs. The implementation prioritized reproducible mixed signal workflows and cloud access patterns to support remote collaboration and iterative prototype evaluation without reference to any prior system name.
Professional Services 160 $26M United States Cadence Design Systems Cadence EDA in the Cloud Electronic Design 2016 n/a
Manufacturing 116224 $30.3B Japan Cadence Design Systems Cadence EDA in the Cloud Electronic Design 2016 n/a
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Buyer Intent: Companies Evaluating Cadence EDA in the Cloud

ARTW Buyer Intent uncovers actionable customer signals, identifying software buyers actively evaluating Cadence EDA in the Cloud. Gain ongoing access to real-time prospects and uncover hidden opportunities. Companies Actively Evaluating Cadence EDA in the Cloud for Electronic Design include:

  1. Bharti Tele Ventures, a India based Communications organization with 100 Employees
  2. Northrop Grumman, a United States based Aerospace and Defense company with 97000 Employees
  3. Indiana University, a United States based Education organization with 21100 Employees

Discover Software Buyers actively Evaluating Enterprise Applications

Logo Company Industry Employees Revenue Country Evaluated
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