List of Cadence Innovus Customers
San Jose, 95134, CA,
United States
Since 2010, our global team of researchers has been studying Cadence Innovus customers around the world, aggregating massive amounts of data points that form the basis of our forecast assumptions and perhaps the rise and fall of certain vendors and their products on a quarterly basis.
Each quarter our research team identifies companies that have purchased Cadence Innovus for Electronic Design, System on Chip Design from public (Press Releases, Customer References, Testimonials, Case Studies and Success Stories) and proprietary sources, including the customer size, industry, location, implementation status, partner involvement, LOB Key Stakeholders and related IT decision-makers contact details.
Companies using Cadence Innovus for Electronic Design, System on Chip Design include: Samsung Foundry, a South Korea based Manufacturing organisation with 262647 employees and revenues of $203.54 billion, Toshiba, a Japan based Manufacturing organisation with 116224 employees and revenues of $30.27 billion, HiSilicon China, a China based Manufacturing organisation with 7000 employees and revenues of $8.30 billion, GlobalFoundries, a United States based Manufacturing organisation with 14000 employees and revenues of $6.79 billion, Global Unichip Corporation, a Taiwan based Manufacturing organisation with 768 employees and revenues of $460.0 million and many others.
Contact us if you need a completed and verified list of companies using Cadence Innovus, including the breakdown by industry (21 Verticals), Geography (Region, Country, State, City), Company Size (Revenue, Employees, Asset) and related IT Decision Makers, Key Stakeholders, business and technology executives responsible for the software purchases.
The Cadence Innovus customer wins are being incorporated in our Enterprise Applications Buyer Insight and Technographics Customer Database which has over 100 data fields that detail company usage of software systems and their digital transformation initiatives. Apps Run The World wants to become your No. 1 technographic data source!
Apply Filters For Customers
| Logo | Customer | Industry | Empl. | Revenue | Country | Vendor | Application | Category | When | SI | Insight |
|---|---|---|---|---|---|---|---|---|---|---|---|
 |
Global Unichip Corporation | Manufacturing | 768 | $460M | Taiwan | Cadence Design Systems | Cadence Innovus | Electronic Design,System on Chip Design | 2023 | n/a |
In 2023, Global Unichip Corporation implemented Cadence Innovus as the physical implementation engine within its Cadence digital flow to deliver an N3 high performance computing core and to optimize an N5 CPU design in Taiwan. The engagement focused on advanced-node SoC physical implementation, executing RTL-to-GDS place-and-route for both N3 and N5 projects.
Cadence Innovus Implementation System was used to perform placement, routing, timing closure, and power-driven optimizations, applying electronic design automation techniques aligned to Electronic Design,System on Chip Design workflows. The implementation delivered higher clock performance reaching 3.16GHz on the N3 HPC core while producing area and power reductions on the N5 CPU design. The flow emphasized PPA optimizations and faster turnaround for tapeout-ready GDS delivery.
The work was embedded in Global Unichip Corporation design operations in Taiwan, integrating with their RTL and physical verification steps to produce RTL-to-GDS deliverables. Functional impacts included SoC design and physical implementation teams, with the Cadence Innovus toolchain orchestrating timing closure and signoff-ready layout.
Process and governance adjustments focused on streamlining the RTL-to-GDS pipeline to accelerate iteration cycles for advanced-node designs and to consolidate physical implementation responsibilities. Outcomes explicitly stated were higher clock speed, improved PPA, area and power reductions, and faster turnaround for advanced-node SoC designs.
|
 |
GlobalFoundries | Manufacturing | 14000 | $6.8B | United States | Cadence Design Systems | Cadence Innovus | Electronic Design,System on Chip Design | 2021 | n/a |
In 2021, GlobalFoundries implemented Cadence Innovus to support Electronic Design,System on Chip Design workflows for its 12LP and 12LP+ FinFET solutions. The deployment emphasized integration of Cadence Innovus into a Cadence digital full flow used for SoC implementation and signoff, positioning the Innovus Implementation System as the central implementation engine for DFM-aware physical design.
The implementation incorporated an ML-enhanced Cadence Litho Physical Analyzer as a functional module for DFM pattern analysis and ML prediction capabilities, providing in-design automated DFM hotspot detection and fixing. GlobalFoundries released the ML-enhanced DFM kit as an update to the 12LP process design kits, with a 12LP+ update scheduled for second quarter 2021, and the ML enhancement was qualified to deliver up to 33% greater detection efficiency with less than 10% runtime impact.
Cadence Innovus was deployed to operate alongside the Cadence Litho Physical Analyzer and the Cadence Virtuoso custom IC design platform, creating a common implementation interface across the digital and custom flows. This integration into customers’ design flows was delivered through the updated 12LP and 12LP+ PDKs, enabling signoff engineers to run ML-driven pattern analysis during implementation for designs targeting AI, data center, hyperscale, aerospace and industrial, and IoT markets.
Governance and process changes centered on embedding ML-based DFM checks into the implementation signoff workflow, enabling signoff engineers to verify signoff quality during implementation. The stated outcomes from the collaboration include improved hotspot detection efficiency, reduced additional runtime impact, and an asserted improvement in yield due to the tool’s ability to catch and repair previously undetected hotspot patterns.
|
 |
HiSilicon China | Manufacturing | 7000 | $8.3B | China | Cadence Design Systems | Cadence Innovus | Electronic Design,System on Chip Design | 2016 | n/a |
In 2016, HiSilicon China adopted the Cadence Innovus Implementation System for production DSP designs in China. Cadence Innovus is an application in Electronic Design,System on Chip Design that HiSilicon deployed to drive digital SoC physical implementation at advanced process nodes.
The deployment emphasized physical design capabilities in Cadence Innovus, including place and route, timing closure workflows, power and area optimization, and implementation automation consistent with an implementation system for SoC design. Configurations were tailored for advanced node DSP blocks and integrated into HiSilicon design flows to shorten implementation schedules and improve PPA.
HiSilicon reported achieving target performance of 1.2GHz while shrinking design area by about 20 percent versus their previous solution, outcomes attributed to Cadence Innovus physical implementation work. The effort focused on production DSP design teams in China and centered on SoC physical implementation and implementation schedule compression.
|
 |
|
Manufacturing | 262647 | $203.5B | South Korea | Cadence Design Systems | Cadence Innovus | Electronic Design,System on Chip Design | 2019 | n/a |
|
|
|
|
Manufacturing | 116224 | $30.3B | Japan | Cadence Design Systems | Cadence Innovus | Electronic Design,System on Chip Design | 2016 | n/a |
|
Buyer Intent: Companies Evaluating Cadence Innovus
- Siemens, a Germany based Manufacturing organization with 312000 Employees
- Altman Solon, a Germany based Professional Services company with 300 Employees
Discover Software Buyers actively Evaluating Enterprise Applications
| Logo | Company | Industry | Employees | Revenue | Country | Evaluated | ||
|---|---|---|---|---|---|---|---|---|
| No data found | ||||||||