List of Siemens Veloce Strato CS Customers
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Since 2010, our global team of researchers has been studying Siemens Veloce Strato CS customers around the world, aggregating massive amounts of data points that form the basis of our forecast assumptions and perhaps the rise and fall of certain vendors and their products on a quarterly basis.
Each quarter our research team identifies companies that have purchased Siemens Veloce Strato CS for Electronic Design from public (Press Releases, Customer References, Testimonials, Case Studies and Success Stories) and proprietary sources, including the customer size, industry, location, implementation status, partner involvement, LOB Key Stakeholders and related IT decision-makers contact details.
Companies using Siemens Veloce Strato CS for Electronic Design include: Arm Holdings, a United Kingdom based Professional Services organisation with 8330 employees and revenues of $4.01 billion, RIKEN, a Japan based Government organisation with 3000 employees and revenues of $722.0 million, CIX Technology China, a China based Manufacturing organisation with 50 employees and revenues of $5.0 million and many others.
Contact us if you need a completed and verified list of companies using Siemens Veloce Strato CS, including the breakdown by industry (21 Verticals), Geography (Region, Country, State, City), Company Size (Revenue, Employees, Asset) and related IT Decision Makers, Key Stakeholders, business and technology executives responsible for the software purchases.
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| Logo | Customer | Industry | Empl. | Revenue | Country | Vendor | Application | Category | When | SI | Insight |
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Arm Holdings | Professional Services | 8330 | $4.0B | United Kingdom | Siemens | Siemens Veloce Strato CS | Electronic Design | 2025 | n/a |
In 2025, Arm Holdings deployed Siemens Veloce Strato CS and Veloce proFPGA CS as part of its verification and validation flow for Arm Neoverse Compute Subsystems. The deployment is positioned within Arm Holdings Electronic Design activity to accelerate SoC verification and to provide partner pre-validation capability across the Arm ecosystem.
The implementation uses Siemens Veloce Strato CS as a hardware emulation platform and Veloce proFPGA CS for FPGA prototyping roles, aligning with standard Electronic Design workflows for emulation, prototyping, and hardware-software co-verification. Configuration focuses on emulation performance and throughput improvements, enabling faster bring-up of Neoverse Compute Subsystems and shortening pre-silicon verification cycles.
Operational coverage spans Arm’s UK base and the broader global Arm ecosystem, and the systems are embedded into Arm’s verification and validation pipelines to support partner pre-validation of silicon solutions. The deployment impacts SoC verification engineering, partner engineering engagements, and validation teams by providing a shared emulation and prototyping infrastructure for early partner testing.
Governance and rollout are organized around verification workflow integration and partner enablement, with the Siemens Veloce Strato CS and Veloce proFPGA CS instrumented to support coordinated pre-validation activities. The stated intention of the deployment is to improve emulation performance and speed time-to-market for Arm partners, by enabling faster pre-validation and verification of silicon solutions.
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CIX Technology China | Manufacturing | 50 | $5M | China | Siemens | Siemens Veloce Strato CS | Electronic Design | 2025 | n/a |
In 2025, CIX Technology China deployed Siemens Veloce Strato CS as part of a Veloce portfolio implementation within its Electronic Design verification framework. The deployment explicitly used Siemens Veloce Strato+, Siemens Veloce Strato CS, and Veloce proFPGA in a coordinated full-process automation verification approach to validate the CIX P1 SoC and its related interfaces.
The implementation combined hardware-assisted emulation and FPGA-based prototyping to support system-level and IP-level verification, driving automated regression runs and interface validation across the verification lifecycle. Siemens Veloce Strato CS was configured alongside the other Veloce family systems to enable accelerated debug turnarounds, testbench reuse, and scripted automation of verification scenarios consistent with Electronic Design practices.
Operational scope was centered in China, with verification and engineering teams using the automated framework to exercise the CIX P1 silicon and peripheral interfaces ahead of production signoff. Governance focused on embedding the Veloce portfolio into existing verification flows, formalizing test case management, and standardizing release gates for the mass-production roadmap.
The China-based use of the Veloce portfolio helped accelerate verification and contributed to meeting mass-production requirements for the CIX P1 product, demonstrating an integrated Electronic Design verification strategy built around Siemens Veloce Strato CS and companion emulation and prototyping systems.
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RIKEN | Government | 3000 | $722M | Japan | Siemens | Siemens Veloce Strato CS | Electronic Design | 2025 | n/a |
In 2025 RIKEN implemented Siemens Veloce Strato CS alongside Catapult HLS to support architecture and design-space exploration for next-generation AI accelerator SoCs used in its AI-for-Science research. The deployment in Japan is focused on Electronic Design workflows that combine rapid synthesis and large-scale emulation for candidate accelerators intended for future supercomputers.
The Siemens Veloce Strato CS implementation centers on hardware-assisted emulation and system-level prototyping capabilities to shorten RTL verification cycles and enable iterative architecture exploration. Catapult HLS is used in tandem to raise design abstraction, feed synthesized RTL into emulation flows, and accelerate exploration of microarchitecture variants, algorithm offload points, and memory subsystem tradeoffs.
Operational coverage targets RIKEN research laboratories and SoC design teams involved in AI-for-Science projects, aligning emulation capacity with workstreams that evaluate accelerator candidates for supercomputing deployment. The implementation architecture emphasizes integrated HLS to emulation handoff, enabling repeatable synthesis to emulation pipelines and supporting concurrent experiments across separate design projects in Japan.
Governance and rollout are organized around iterative design-space studies and validation cycles, with procedures to version HLS models, manage emulation sessions, and coordinate results between algorithmic researchers and hardware designers. The effort explicitly aims to accelerate rapid synthesis and large-scale emulation for AI devices, positioning Siemens Veloce Strato CS and Catapult HLS as core Electronic Design tools for RIKENs next-generation accelerator research.
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